1. Field of the Invention
The present invention relates to a method of manufacturing a semiconductor device including a wiring structure or a gate electrode structure of a MOSFET (metal oxide semiconductor field effect transistor) formed on a semiconductor substrate.
2. Description of the Background Art
A conventional method of manufacturing a MOSFET, for example, will be set forth with reference to FIGS. 12 to 17. First, a gate insulating film 40 and a non-single crystalline silicon film 50 are formed on a semiconductor substrate 10 such as a silicon substrate, in the surface of which a well 30 and an element isolation film 20 are formed (FIG. 12).
Then, a photoresist is formed on the non-single crystalline silicon film 50 and is patterned by a photolithographic technique for formation of a gate electrode. The non-single crystalline silicon film 50 is etched using the photoresist as a mask and a gate electrode is formed by the removal of the photoresist (FIG. 13).
Subsequent ion implantation 100 (FIG. 14) produces source/drain extension layers 60 in the well 30. If the ionic species to be implanted has to be changed depending on the type, p-type or n-type, of the well 30, one side of the well 30 should be covered as necessary with the photoresist.
Then, an insulating film to cover the gate insulating film 40 and the non-single crystalline silicon film 50 is formed and etched to form gate sidewall protection films 70 (FIG. 15). At this time, as shown in FIG. 15, portions of the gate insulating film 40, which are not covered with the non-single crystalline silicon film 50 and the gate sidewall protection films 70, can also be removed.
Following ion implantation 110 (FIG. 16) produces source/drain regions 80 in the well 30. Here again, if the ionic species to be implanted has to be changed depending on the type, p-type or n-type, of the well 30, one side of the well 30 should be covered as necessary with the photoresist. Further, thermal processing may be performed for recovering damage from the ion implantation.
Then, a metal film (Co, etc.) to cover the gate electrode and the substrate is formed by sputtering, and through thermal processing, silicide layers 90 of CoSi2, etc., are formed in the surface of the gate electrode of the non-single crystalline silicon film 50 and in the surface of the source/drain regions 80 (FIG. 17). At this time, the unreacted metal film is removed and residual compounds are changed into the silicide layers 90 through appropriate thermal processing.
In the aforementioned MOSFET manufacturing method, the patterning of the non-single crystalline silicon film 50 during the transition from the step of FIG. 12 to that of FIG. 13 may be done with the photoresist, or alternatively, it may be done with a material of higher physical strength than the photoresist, such as a silicon oxide film, as an etching mask (such an etching mask is hereinafter referred to as a xe2x80x9chard maskxe2x80x9d).
In such a case, a hard mask 55 is formed after the step of FIG. 12 (FIG. 18) and a photoresist is formed on the hard mask 55 and is patterned by the photolithographic technique for formation of a gate electrode.
The hard mask 55 is then etched using the photoresist as a mask and the photoresist is removed (FIG. 19). During the etching of the hard mask 55, the non-single crystalline silicon film 50 also is somewhat etched, causing a difference in level 50a as shown in FIG. 19. This, however, can be prevented by setting a high etch selectivity between the non-single crystalline silicon film 50 and the hard mask 55.
The non-single crystalline silicon film 50 is etched using the hard mask 55 as a mask, whereby a gate electrode is formed (FIG. 20).
The use of the hard mask 55 as a mask brings the following advantages. If a material with great controllability over etching, such as a silicon oxide film, is used as a hard mask, finer patterning can be achieved with additional isotropic etching after the step of FIG. 19 (FIG. 21). If this hard mask is used as a mask for the patterning of the non-single crystalline silicon film 50, a gate electrode of smaller dimensions can be formed (FIG. 22).
Taking, for example, a KrF excimer laser which is commonly used as a light source in the current photolithographic technique. Since the laser has a wavelength of 0.248 xcexcm, exposure only is not enough to achieve a gate length on the order of 0.1 xcexcm. However, the use of the aforementioned material with great controllability over etching as a hard mask allows patterning for formation of a gate electrode of smaller dimensions as shown in FIG. 21.
While the above description refers to the method of manufacturing a gate electrode of a MOSFET, the same process as shown in FIGS. 12 and 13 is also applicable to the formation of a wiring structure on the substrate.
Now, it is effective for MOSFETs to reduce their gate lengths for higher performance and higher integration density. Also in the formation of a wiring structure, a reduced width of wiring is required for higher integration density.
In forming elements in a wafer, however, it is difficult to provide uniform exposure in the photolithographic process since the crowdedness of the pattern is generally different in each location. More specifically, such a difference in the pattern crowdedness varies the reflection of a light beam during exposure and thereby makes it difficult to transfer the pattern as designed on the photoresist. It is thus not easy to uniformly reduce the gate lengths in the wafer surface.
To reduce variations occurring during process due to variations in the pattern crowdedness, anti-reflection coatings (ARC) have been introduced. The anti-reflection coatings are films for preventing a transmitted light which passes through a resist during exposure in the photolithographic process from reflecting and adversely effecting design dimensions such as the gate length. Specifically, a silicon oxy-nitride film, for example, serves as a material for the anti-reflection coatings.
The anti-reflection coatings come in two types: those for filling irregularities of the pattern crowdedness and those for preventing the occurrence of multiple reflections which is a phenomenon that repeated reflections of the transmitted light occur between the substrate and the resist. Herein, the latter anti-reflection coatings shall be noted.
When the anti-reflection coating is introduced into the aforementioned semiconductor device manufacturing method using a hard mask, the following problems arise. A silicon oxy-nitride film, for example, is a material which is difficult to increase etch selectivity to silicon. Using such a silicon oxy-nitride film for the anti-reflection coating makes it difficult to etch only the anti-reflection coating without etching the substrate and the gate electrode in a process where the silicon substrate and the polysilicon gate electrode are exposed.
This will be described with reference to FIGS. 23 to 29. After the step of FIG. 18, an anti-reflection coating 56 is formed over the whole surface of the hard mask 55 (FIG. 23). At this time, the anti-reflection coating 56 is not directly formed on the non-single crystalline silicon film 50 in order to prevent the non-single crystalline silicon film 50 from being etched upon completion of the etching of the anti-reflection film 56 and thereby to prevent the occurrence of variations in the height of the gate electrode, when a material which is difficult to increase etch selectivity to silicon, such as a silicon oxy-nitride film, is used for the anti-reflection coating 56.
Following this, a photoresist is formed on the anti-reflection coating 56 and is patterned by the photolithographic technique for formation of a gate electrode. The anti-reflection coating 56 and the hard mask 55 are then etched using the photoresist as a mask and the photoresist is removed (FIG. 24).
During the etching of the hard mask 55, the non-single crystalline silicon film 50 also is somewhat etched as shown in FIG. 24. This, however, can be prevented by setting a high etch selectivity between the hard mask 55 and both the non-single crystalline silicon film 50 and the anti-reflection coating 56.
Then, only the anti-reflection coating 56 is removed by etching and the non-single crystalline silicon film 50 is etched using the hard mask 55 as a mask, whereby a gate electrode is formed.
When a material which is difficult to increase etch selectivity to silicon, such as a silicon oxy-nitride film, is used for the anti-reflection coating 56, it becomes difficult to insure etch selectivity to the non-single crystalline silicon film 50. Thus, if the anti-reflection coating 56 is removed with an etching solution of phosphoric acid, for example, the non-single crystalline silicon film 50 is further etched as shown in FIG. 25.
This produces constrictions 50c in the gate electrode and prevents the manufacture of a semiconductor device of designed dimensions through the use of the hard mask 55 as a mask. Also, a problem of varying finished dimensions arises.
These problems can be solved by adopting not isotropic etching such as wet etching but adopting anisotropic etching such as RIE (reactive ion etching) to the process of removing the anti-reflection coating 56.
There is however still another problem which cannot be solved by only the adoption of anisotropic etching. That is, anisotropic etching is difficult to coexist with the process of isotropic etching of the hard mask 55 for finer patterning.
FIG. 26 shows the state after the completion of anisotropic etching and the removal of the anti-reflection coating 56 in the step of FIG. 24. Although no such constrictions as illustrated in FIG. 25 are seen in FIG. 26, the surface of the non-single crystalline silicon film 50 is removed simultaneously with the removal of the anti-reflection coating 56. The non-single crystalline silicon film 50, therefore, has a great difference in level 50d between a portion directly under the hard mask 55 and a portion not covered with the hard mask 55. This difference in level 50d is greater than the difference in level 50a shown in FIG. 19.
Under this condition, the hard mask 55 is isotropically etched for allowing finer patterning of non-single crystalline silicon, which is shown in FIG. 27. If, in FIG. 27, only the thickness of a portion of the non-single crystalline silicon film 50, which had not been covered with the hard mask 55 before the isotropic etching, is etched using the hard mask 55 as a mask, the result is as shown in FIG. 28. That is, the difference in level 50d caused by the removal of the anti-reflection coating 56 remains as-is as a difference in level 50e in the gate electrode; therefore, the finished gate length is not the one as designed.
If the etch time is further extended to eliminate the difference in level 50e in the gate electrode, not only the gate insulating film 40 but also the surface of the semiconductor substrate 10 are etched as shown in FIG. 29, causing depressions 30a. Since recent gate insulating films are designed to be thin, e.g., approximately 1 nm, even if the etch selectivity between the non-signal crystalline silicon film 50 and the gate insulating film 40 is high, the gate insulating film 40 is likely to be etched. Consequently, the semiconductor substrate 10 also is subjected to etching, which may cause the depressions 30a. 
The depressions 30a in the semiconductor substrate 10 have an adverse impact on the formation of source/drain regions and on the formation of a silicide layer, resulting in unstable transistor characteristics. The thinner the gate insulating film 40 and the non-single crystalline silicon film 50, the more adverse the impact.
A first aspect of the present invention is directed to a method of manufacturing a semiconductor device comprising the steps of: (a) preparing a substrate; (b) forming a film to be etched, an etching mask, and a functional film having a predetermined function in this order on the substrate; (c) patterning the functional film and the etching mask by photolithographic and etching techniques, wherein etching of the etching mask is stopped halfway through the patterning; (d) removing the functional film by etching; (e) completing the etching of the etching mask which has been stopped in the step (c); and (f) patterning the film to be etched using the etching mask as a mask.
According to a second aspect of the present invention, in the method of manufacturing a semiconductor device of the first aspect, in the step (e), isotropic etching is performed to reduce a patterning width of the etching mask.
According to a third aspect of the present invention, in the method of manufacturing a semiconductor device of the first aspect, the functional film has etch selectivity to the etching mask, and the step (d) is performed prior to the step (e).
According to a fourth aspect of the present invention, in the method of manufacturing a semiconductor device of the first aspect, the etching of the functional film in the step (d) is completed at the same time as or earlier than completion of the etching of the etching mask in the step (e).
According to a fifth aspect of the present invention, in the method of manufacturing a semiconductor device of the first aspect, the functional film is an anti-reflection coating.
A sixth aspect of the present invention is directed to a method of manufacturing a semiconductor device, comprising the steps of: (a) preparing a substrate; (b) forming a film to be etched, a first etching mask, and a functional film having a predetermined function in this order on the substrate; (c) patterning the functional film and the first etching mask by photolithographic and etching techniques; (d) forming a second etching mask in a portion of the film to be etched which is not covered with both the functional film and the first etching mask; (e) removing the functional film by etching; and (i) removing the second etching mask by etching; (g) patterning the film to be etched using the first etching mask as a mask.
According to a seventh aspect of the present invention, in the method of manufacturing a semiconductor device of the sixth aspect, in the step (f), the removal of the second etching mask is made by isotropic etching which reduces a patterning width of the first etching mask.
According to an eighth aspect of the present invention, in the method of manufacturing a semiconductor device of the sixth aspect, the film to be etched is a non-single crystalline silicon film, the second etching mask is a silicon oxide film, and in the step (d), the second etching mask is formed by oxidizing a surface of the non-single crystalline silicon film.
According to a ninth aspect of the present invention, in the method of manufacturing a semiconductor device of the sixth aspect, the functional film has etch selectivity to the second etching mask, and the step (e) is performed prior to the step (f).
According to a tenth aspect of the present invention, in the method of manufacturing a semiconductor device of the sixth aspect, the removal of the functional film in the step (e) is completed at the same time as or earlier than the removal of the second etching mask in the step (f).
According to an eleventh aspect of the present invention, in the method of manufacturing a semiconductor device of the sixth aspect, the functional film is an anti-reflection coating.
In the first aspect of the present invention, in the step (c), the etching of the etching mask is stopped halfway through the patterning, and in the step (d), the function film is removed. Thus, even when a material which is difficult to increase etch selectivity to the film to be etched is used for the function film, a depression or a difference in level is unlikely to occur in the film to be etched, which allows the manufacture of a semiconductor device of constant finished dimensions as designed.
In the second aspect of the present invention, in the step (e), after the completion of the removal of the function film, the etching of the etching mask is completed and the patterning width of the etching mask is reduced. The film to be etched can thus be patterned without causing a difference in level. From this, finer patterning of the film to be etched becomes possible.
In the third aspect of the present invention, the function film has etch selectivity to the etching mask and the step (d) is performed prior to the step (e). This prevents the film to be etched from being exposed during the removal of the functional film. Thus, even when a material which is difficult to increase etch selectivity to the film to be etched is used for the functional film, a depression or a difference in level is unlikely to occur in the film to be etched, which allows the manufacture of a semiconductor device of constant finished dimensions as designed.
In the fourth aspect of the present invention, the etching of the functional film in the step (d) is completed at the same time as or earlier than the completion of the etching of the etching mask in the step (e). This prevents the film to be etched from being exposed during the removal of the functional film. Thus, even when a material which is difficult to increase etch selectivity to the film to be etched is used for the functional film, a depression or a difference in level is unlikely to occur in the film to be etched, which allows the manufacture of a semiconductor device of constant finished dimensions as designed.
In the fifth aspect of the present invention, even when a material which is difficult to increase etch selectivity to the film to be etched is used for the anti-reflection coating, a depression or a difference in level is unlikely to occur in the film to be etched, which allows the manufacture of a semiconductor device of constant finished dimensions as designed.
In the sixth aspect of the present invention, in the step (d), the second etching mask is formed in a portion of the film to be etched which is not covered with both the function film and the first etching mask, and in the step (e), the function film is removed. Thus, even when a material which is difficult to increase etch selectivity to the film to be etched is used for the functional film, a depression or a difference in level is unlikely to occur in the film to be etched, which allows the manufacture of a semiconductor device of constant finished dimensions as designed.
In the seventh aspect of the present invention, in the step (f), the removal of the second etching mask is made by isotropic etching which reduces the patterning width of the first etching mask. The film to be etched can thus be patterned without causing a difference in level. From this, finer patterning of the film to be etched becomes possible.
In the eighth aspect of the present invention, in the step (d), the second etching mask is formed by oxidizing the surface of the non-single crystalline silicon film. This facilitates the formation of the second etching mask and improves controllability over film thickness.
In the ninth aspect of the present invention, the functional film has etch selectivity to the second etching mask and the step (e) is performed prior to the step (f). This prevents the film to be etched from being exposed during the removal of the functional film. Thus, even when a material which is difficult to increase etch selectivity to the film to be etched is used for the functional film, a depression or a difference in level is unlikely to occur in the film to be etched, which allows the manufacture of a semiconductor device of constant finished dimensions as designed.
In the tenth aspect of the present invention, the removal of the functional film in the step (e) is completed at the same time as or earlier than the removal of the second etching mask in the step (f). This prevents the film to be etched from being exposed during the removal of the functional film. Thus, even when a material which is difficult to increase etch selectivity to the film to be etched is used for the functional film, a depression or a difference in level is unlikely to occur in the film to be etched, which allows the manufacture of a semiconductor device of constant finished dimensions as designed.
In the eleventh aspect of the present invention, even when a material which is difficult to increase etch selectivity to the film to be etched is used for the anti-reflection coating, a depression or a difference in level is unlikely to occur in the film to be etched, which allows the manufacture of a semiconductor device of constant finished dimensions as designed.
An object of the present invention is to provide a semiconductor device manufacturing method that is capable of manufacturing a semiconductor device of constant finished dimensions as designed even when a material which is difficult to increase etch selectivity to a silicon film in a gate electrode or wiring structure is used for an anti-reflection coating, and that is capable of achieving finer patterning through the use of a silicon oxide film or the like as a hard mask.